I am use a STM32H743 to implement a read and write 16bit external FPGA by FMC(SRAM). I use NE1 and read-write from 0x60000000. I found some problem with the action HAL_SRAM_Write_16b.
- I found some note from online which it say the FMC have some cache need to manage MPU. ,When I not set MPU(memory protection unit), it will happen hard fault. UFSR->0x100, UNALIGNED is set.
- Whem I use below code, it can read and write. But it have a problem, when I use HAL_SRAM_Write_16b, it will write 4 times. It is full AXI programming. I don’t want the result…
/* Disable MPU */
MPU_InitStruct.Enable = MPU_REGION_ENABLE; MPU_InitStruct.BaseAddress = 0x60000000; MPU_InitStruct.Size = MPU_REGION_SIZE_64MB; MPU_InitStruct.AccessPermission = MPU_REGION_FULL_ACCESS; MPU_InitStruct.IsBufferable = MPU_ACCESS_NOT_BUFFERABLE; MPU_InitStruct.IsCacheable = MPU_ACCESS_NOT_CACHEABLE; MPU_InitStruct.IsShareable = MPU_ACCESS_NOT_SHAREABLE; MPU_InitStruct.Number = MPU_REGION_NUMBER0; MPU_InitStruct.TypeExtField = MPU_TEX_LEVEL1; MPU_InitStruct.SubRegionDisable = 0x00; MPU_InitStruct.DisableExec = MPU_INSTRUCTION_ACCESS_DISABLE; HAL_MPU_ConfigRegion(&MPU_InitStruct); /* Enable MPU */ HAL_MPU_Enable(MPU_PRIVILEGED_DEFAULT);
- Because I set TEX = MPU_TEX_LEVEL1. It is device memory type. Not strongly ordered. So I change MPU_TEX_LEVEL1 to MPU_TEX_LEVEL0, it will show hard fault also. UFSR->0x100, UNALIGNED is set also.
Does something what I miss to modify?