Arm Mbed and Pelion Device Management support forum

How to configure clock setting for custom K64F board in target.json file?

Hello,
I am working on K64 controller. I have successfully tested code for FRDM K64F board by uploading .bin file to the dev board.

I am now struggling with changing the clock setting for custom K64F board. There is 12 MHz external crystal for clock source and 32.768 kHz RTC crystal on custom board.

My question is
how to modify the clock setting of K64f custom board in target.json file ?
Can somebody help me to figure it out? Any help is appreciated.

Thank you,
Kirti

Hi Kirti,

Look at this:
https://os.mbed.com/docs/mbed-os/v5.15/porting/porting-a-custom-board.html
In the customizing there is something about setting clock source.

Regards,
Pekka

Thank you for the reply Pekka.
Yes…I am checking out the porting custom board document and trying to make a custom-target.json file for the K64 custom board.

Hi Pekka,
I have gone through the link above and tried to create the new custom_board_targets.josn as per the instructions. There is no config setting available for K64F board in targets.json. So I have not included it.
My custom_targets.json is as below.
{
“CUSTOMK64FBOARD”: {
“supported_form_factors”: [“ARDUINO”],
“components_add”: [“SD”, “FLASHIAP”],
“core”: “Cortex-M4F”,
“supported_toolchains”: [“ARM”, “GCC_ARM”, “IAR”],
“extra_labels”: [
“Freescale”,
“MCUXpresso_MCUS”,
“KSDK2_MCUS”,
“FRDM”,
“KPSDK_MCUS”,
“KPSDK_CODE”,
“MCU_K64F”,
“Freescale_EMAC”,
“PSA”
],
“is_disk_virtual”: true,

    "macros": ["CPU_MK64FN1M0VMD12", "FSL_RTOS_MBED", "MBED_SPLIT_HEAP", "MBED_TICKLESS"],
    "inherits": ["Target"],
    "detect_code": ["1234"],
    "device_has": [
        "USTICKER",
        "LPTICKER",
        "RTC",
        "CRC",
        "ANALOGIN",
        "ANALOGOUT",
        "EMAC",
        "I2C",
        "I2CSLAVE",
        "INTERRUPTIN",
        "PORTIN",
        "PORTINOUT",
        "PORTOUT",
        "PWMOUT",
        "RESET_REASON",
        "SERIAL",
        "SERIAL_FC",
        "SERIAL_ASYNCH",
        "SLEEP",
        "SPI",
        "SPI_ASYNCH",
        "SPISLAVE",
        "STDIO_MESSAGES",
        "TRNG",
        "FLASH",
        "USBDEVICE",
        "WATCHDOG"
    ],
    "release_versions": ["2", "5"],
    "device_name": "MK64FN1M0VLL12",
    "bootloader_supported": true,
    "overrides": {
        "network-default-interface-type": "ETHERNET"
    }
}

}
As I am using 12 MHz external crystal for clock source and 32.768 kHz RTC crystal on custom board, I have made changes in fsl_clock_config.c and fsl_clock_config.h file. The path for these files is mbed-os\targets\TARGET_Freescale\TARGET_MCUXpresso_MCUS\TARGET_MCU_K64F\TARGET_FRDM.
The changes I have made are in fsl_clock_config.h file:

BOARD_XTAL0_CLK_HZ 12000000U

The changes I have made are in fsl_clock_config.c file:
const clock_config_t g_defaultClockConfigRun = {
.mcgConfig =
{
.mcgMode = kMCG_ModePEE, /* Work in PEE mode. /
.irclkEnableMode = kMCG_IrclkEnable, /
MCGIRCLK enable. /
.ircs = kMCG_IrcSlow, /
Select IRC32k. /
.fcrdiv = 0U, /
FCRDIV is 0. */

        .frdiv = 7U,
        .drs = kMCG_DrsLow,         /* Low frequency range. */
        .dmx32 = kMCG_Dmx32Default, /* DCO has a default range of 25%. */
        .oscsel = kMCG_OscselOsc,   /* Select OSC. */

        .pll0Config =
            {
                .enableMode = 0U, .prdiv = 0x13U, .vdiv = 0x18U,
            },
    },
.simConfig =
    {
        .pllFllSel = 1U,        /* PLLFLLSEL select PLL. */
        .er32kSrc = 2U,         /* ERCLK32K selection, use RTC. */
        .clkdiv1 = 0x01140000U, /* SIM_CLKDIV1. */
    },
.oscConfig = {.freq = BOARD_XTAL0_CLK_HZ,
              .capLoad = 0,
              .workMode = kOSC_ModeExt,
              .oscerConfig =
                  {
                      .enableMode = kOSC_ErClkEnable,

#if (defined(FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER) && FSL_FEATURE_OSC_HAS_EXT_REF_CLOCK_DIVIDER)
.erclkDiv = 0U,
#endif
}},
.coreClock = 100000000U, /* Core clock frequency */
};

Please let me know if it is correct.

Also wanted know that if there is any other setting for memory is needed in compiling or in build file.

Any help is appreciated.
Thank you,
Kirti