QSPI and NUCLEO board: SDR mode problems

I am trying to use QSPI interface with NUCLEO-H743ZI2 or F746ZG boards.
I have initialized the board and can send the data - here are the pieces of code:
QSPI qspi_device(PD_11, PD_12, PE_2, PD_13, PB_2, PG_6, 0); // 0 - SCLK=0, 1 - SCLK=1

result = qspi_device.configure_format(QSPI_CFG_BUS_QUAD, QSPI_CFG_BUS_QUAD,

result = qspi_device.write(0xAA, 0x99, 0x8765, tx_buf, &buf_len); // instr, alt, addr, data, size

Here is the picture I see on the logic analyser:
Obviously the data sent on SCK rising edge and should be sampled on SCK falling edge.
But according to the STM application note AN4760 situation should opposite:
SDR: data sent on CLK falling edge and sampled on CLK rising edge.

What am I doing wrong?
Is there any way for the MBed OS to control when the data is set and when it should be read?
I have looked QSPI.cpp and QSPI.h but did not find such possibility.

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I found the problem - and it is not in the STM, but in the settings of my logic probe.
I found that it shows Data[3:0] as a Number at the positive edge of clock.
So I changed settings and here is the correct figure from the logic probe:
So STM application note is correct:
SDR: data sent on CLK falling edge and sampled on CLK rising edge.