Scheduling times for Cortex-M0+/M4/M7

I’m evaluating an RTOS for the next hardware/software platform for a customer. On this platform, different devices will be realized. Depending on the functionality, different uC and hardware will be required.

I am curious about timings. Could you help me with the following informations

Task scheduling:

  • Preempt low priority task and schedule high priority task.
  • Schedule from task to task on same priority. E.g. first thread blocked on a semaphore.
  • Schedule from inactivated (e.g. blocking on a semaphore) high priority task to low priority pending task.

Interrupt scheduling:
- Number of cycles from interrupt becoming active until first instruction of the user interrupt handler.
- Schedule from end of interrupt back to the task preempted by this interrupt.
- Schedule from end of interrupt to a task higher than the task that the interrupt has preempted.
- Assume an application with 16-64 tasks using 8 priorities.
- How much adds an FPU?
- How much adds an MPU/MPU?

Thanks for help