Hello,
I’m currently also working on this and the removal of these lines makes the can useable.
Be aware of that the frequency of the fdcan-peripheral is hard coded in the can_api to 10MHz, while the normal PLLQ frequency is 170MHz.
You can manipulate the system_clock to set the PLLQ to 10MHz or, what I prefer, change the frequency in the can_api.c (in dir TARGET_STM)
I’m wondering, why this frequency is hard coded and changed it to be calculated like this:
In Function _can_init_freq_direct exchange
int ntq = 10000000 / hz;
with
/** Calculate the fdcan clk value for accurate calculation of the quantum timing
* !Attention Not all bitrates can be covered with all fdcan clk values. When a clk
* does not work for the desired bitrate, change system_clock settings for PLLQ
*/
int pll_source_clk;
int pll_source = (RCC->PLLCFGR & RCC_PLLCFGR_PLLSRC_Msk);
if (pll_source == RCC_PLLCFGR_PLLSRC_HSE){
pll_source_clk = HSE_VALUE;
} else if (pll_source == RCC_PLLCFGR_PLLSRC_HSI){
pll_source_clk = HSI_VALUE;
} else {
MBED_ERROR(
MBED_MAKE_ERROR(MBED_MODULE_DRIVER_CAN, MBED_ERROR_CODE_CONFIG_UNSUPPORTED),
"PLL source must be HSI or HSE");
}
int pllm = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLM_Msk) >> RCC_PLLCFGR_PLLM_Pos) + 1;
int plln = (RCC->PLLCFGR & RCC_PLLCFGR_PLLN_Msk) >> RCC_PLLCFGR_PLLN_Pos;
int pllq = ((RCC->PLLCFGR & RCC_PLLCFGR_PLLQ_Msk) >> RCC_PLLCFGR_PLLQ_Pos) + 1;
pllq = pllq * 2;
int fdcan_freq = ((pll_source_clk / pllm) * plln) / pllq;
int ntq = fdcan_freq/ hz;
This enables the Classic Can, there is no support for real FDCAN as far as I’m aware of.
Greetings,
Martin.